1/9 june 2001 n high speed: t pd = 4.0 ns (typ.) at v cc = 5v n low power dissipation: i cc = 4 m a (max.) at t a =25c n high noise immunity: v nih = v nil = 28% v cc (min.) n power down protection on control inputs n symmetrical output impedance: |i oh | = i ol = 8 ma (min) n balanced propagation delays: t plh @ t phl n operating voltage range: v cc (opr) = 2v to 5.5v n pin and function compatible with 74 series 245 n improved latch-up immunity n low noise: v olp = 0.9v (max.) description the 74vhc245 is an advanced high-speed cmos octal bus transceiver (3-state) fabricated with sub-micron silicon gate and double-layer metal wiring c 2 mos technology. this ic is intended for two-way asynchronous communication between data busses; the direction of data transmission is determined by dir input. the enable input g can be used to disable the device so that the busses are effectively isolated. all inputs and outputs are equipped with protection circuits against static discharge, giving them 2kv esd immunity and transient excess voltage. all floating bus terminals during high z state must be held high or low. 74vhc245 octal bus transceiver (3-state) pin connection and iec logic symbols order codes package tube t & r sop 74VHC245M 74VHC245Mtr tssop 74vhc245ttr tssop sop
74vhc245 2/9 input equivalent circuit pin description truth table x : dont care z : high impedance absolute maximum ratings absolute maximum ratings are those values beyond which damage to the device may occur. functional operation under these conditi ons is not implied recommended operating conditions 1) v in from 30% to 70% of v cc pin no symbol name and function 1 dir directional control 2, 3, 4, 5, 6, 7, 8, 9 a1 to a8 data inputs/outputs 18, 17, 16, 15, 14, 13, 12, 11 b1 to b8 data inputs/outputs 19 g output enable input 10 gnd ground (0v) 20 v cc positive supply voltage inputs function output g dir a bus b bus l l output input a = b l h input output b = a hxzzz symbol parameter value unit v cc supply voltage -0.5 to +7.0 v v i dc input voltage (dir, g ) -0.5 to +7.0 v v i/o bus i/o voltage -0.5 to v cc + 0.5 v v o dc output voltage -0.5 to v cc + 0.5 v i ik dc input diode current - 20 ma i ok dc output diode current 20 ma i o dc output current 25 ma i cc or i gnd dc v cc or ground current 75 ma t stg storage temperature -65 to +150 c t l lead temperature (10 sec) 300 c symbol parameter value unit v cc supply voltage 2 to 5.5 v v i input voltage (dir, g ) 0 to 5.5 v v i/o bus i/o voltage 0 to v cc v v o output voltage 0 to v cc v t op operating temperature -55 to 125 c dt/dv input rise and fall time (note 1) (v cc = 3.3 0.3v) (v cc = 5.0 0.5v) 0 to 100 0 to 20 ns/v
74vhc245 3/9 dc specifications symbol parameter test condition value unit v cc (v) t a = 25c -40 to 85c -55 to 125c min. typ. max. min. max. min. max. v ih high level input voltage 2.0 1.5 1.5 1.5 v 3.0 to 5.5 0.7v cc 0.7v cc 0.7v cc v il low level input voltage 2.0 0.5 0.5 0.5 v 3.0 to 5.5 0.3v cc 0.3v cc 0.3v cc v oh high level output voltage 2.0 i o =-50 m a 1.9 2.0 1.9 1.9 v 3.0 i o =-50 m a 2.9 3.0 2.9 2.9 4.5 i o =-50 m a 4.4 4.5 4.4 4.4 3.0 i o =-4 ma 2.58 2.48 2.4 4.5 i o =-8 ma 3.94 3.8 3.7 v ol low level output voltage 2.0 i o =50 m a 0.0 0.1 0.1 0.1 v 3.0 i o =50 m a 0.0 0.1 0.1 0.1 4.5 i o =50 m a 0.0 0.1 0.1 0.1 3.0 i o =4 ma 0.36 0.44 0.55 4.5 i o =8 ma 0.36 0.44 0.55 ioz high impedance output leakage current 5.5 v i = v ih or v il v o = v cc or gnd 0.25 2.5 2.5 m a i i input leakage current 0 to 5.5 v i = 5.5v or gnd 0.1 1 1 m a i cc quiescent supply current 5.5 v i = v cc or gnd 44040 m a
74vhc245 4/9 ac electrical characteristics (input t r = t f = 3ns) (*) voltage range is 3.3v 0.3v (**) voltage range is 5.0v 0.5v note 1 : parameter guaranteed by design. t solh = |t plhm - t plhn |, t sohl = |t phlm - t phln | capacitive characteristics 1) c pd is defined as the value of the ics internal equivalent capacitance which is calculated from the operating current consumption without load. (refer to test circuit). average operating current can be obtained by the following equation. i cc(opr) = c pd x v cc x f in + i cc /8 (per circuit) symbol parameter test condition value unit v cc (v) c l (pf) t a = 25c -40 to 85c -55 to 125c min. typ. max. min. max. min. max. t plh t phl propagation delay time 3.3 (*) 15 5.8 8.4 1.0 10.0 1.0 10.0 ns 3.3 (*) 50 8.3 11.9 1.0 13.5 1.0 13.5 5.0 (**) 15 4.0 5.5 1.0 6.5 1.0 6.5 5.0 (**) 50 5.5 7.5 1.0 8.5 1.0 8.5 t pzl t pzh output disable time 3.3 (*) 15 r l = 1k w 8.5 13.2 1.0 15.5 1.0 15.5 ns 3.3 (*) 50 r l = 1k w 11.0 16.7 1.0 19.0 1.0 19.0 5.0 (**) 15 r l = 1k w 5.8 8.5 1.0 10.0 1.0 10.0 5.0 (**) 50 r l = 1k w 7.3 10.6 1.0 12.0 1.0 12.0 t plz t phz output enable time 3.3 (*) 50 r l = 1k w 11.5 15.8 1.0 18.0 1.0 18.0 ns 5.0 (**) 50 r l = 1k w 7.0 9.7 1.0 11.0 1.0 11.0 t oslh t oshl output to output skew time (note 1) 3.3 (*) 50 1.5 1.5 1.5 ns 5.0 (**) 50 1.0 1.0 1.0 symbol parameter test condition value unit t a = 25c -40 to 85c -55 to 125c min. typ. max. min. max. min. max. c in input capacitance 4101010pf c i/o output capacitance 8pf c pd power dissipation capacitance (note 1) 21 pf
74vhc245 5/9 dynamic switching characteristics 1) worst case package. 2) max number of outputs defined as (n). data inputs are driven 0v to 5.0v, (n-1) outputs switching and one output at gnd. 3) max number of data inputs (n) switching. (n-1) switching 0v to 5.0v. inputs under test switching: 5.0v to threshold (v ild ), 0v to threshold (v ihd ), f=1mhz. test circuit c l =15/ 50pf or equivalent (includes jig and probe capacitance) r l = r 1 = 1k w or equivalent r t = z out of pulse generator (typically 50 w ) symbol parameter test condition value unit v cc (v) t a = 25c -40 to 85c -55 to 125c min. typ. max. min. max. min. max. v olp dynamic low voltage quiet output (note 1, 2) 5.0 c l = 50 pf 0.6 0.9 v v olv -0.9 -0.6 v ihd dynamic high voltage input (note 1, 3) 5.0 3.5 v v ild dynamic low voltage input (note 1, 3) 5.0 1.5 v test switch t plh , t phl open t pzl , t plz v cc t pzh , t phz gnd
74vhc245 6/9 waveform 1: propagation delays (f=1mhz; 50% duty cycle) waveform 2: output enable and disable time (f=1mhz; 50% duty cycle)
74vhc245 7/9 dim. mm. inch min. typ max. min. typ. max. a 2.65 0.104 a1 0.1 0.2 0.004 0.008 a2 2.45 0.096 b 0.35 0.49 0.014 0.019 b1 0.23 0.32 0.009 0.012 c 0.5 0.020 c1 45 (typ.) d 12.60 13.00 0.496 0.512 e 10.00 10.65 0.393 0.419 e 1.27 0.050 e3 11.43 0.450 f 7.40 7.60 0.291 0.300 l 0.50 1.27 0.020 0.050 m 0.75 0.029 s8 (max.) so-20 mechanical data po13l
74vhc245 8/9 dim. mm. inch min. typ max. min. typ. max. a 1.2 0.047 a1 0.05 0.15 0.002 0.004 0.006 a2 0.8 1 1.05 0.031 0.039 0.041 b 0.19 0.30 0.007 0.012 c 0.09 0.20 0.004 0.0089 d 6.4 6.5 6.6 0.252 0.256 0.260 e 6.2 6.4 6.6 0.244 0.252 0.260 e1 4.3 4.4 4.48 0.169 0.173 0.176 e 0.65 bsc 0.0256 bsc k0 80 8 l 0.45 0.60 0.75 0.018 0.024 0.030 tssop20 mechanical data c e b a2 a e1 d 1 pin 1 identification a1 l k e 0087225c
74vhc245 information furnished is believed to be accurate and reliable. however, stmicroelectronics assumes no responsibility for the consequences of use of such information nor for any infringement of patents or other rights of third parties which may result f rom its use. no license is granted by implication or otherwise under any patent or patent rights of stmicroelectronics. specificati ons mentioned in this publication are subject to change without notice. this publication supersedes and replaces all information previously supplied. stmicroelectronics products are not authorized for use as critical components in life support devices or systems without express written approval of stmicroelectronics. ? the st logo is a registered trademark of stmicroelectronics ? 2001 stmicroelectronics - printed in italy - all rights reserved stmicroelectronics group of companies australia - brazil - china - finland - france - germany - hong kong - india - italy - japan - malaysia - malta - morocco singapore - spain - sweden - switzerland - united kingdom ? http://www.st.com 9/9
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